Issues

• CI: the required Bazel job's Renode step selects zero tests; run on their real tag, 3 of 4 fail

  pulseengine/synth#1731 · Filter by author avrabe opened on Nov 14, 2026

• relocatable: no way to keep a wasm export local, so two wit-bindgen objects collide on cabi_realloc when co-linked

  pulseengine/synth#1726 · Filter by author avrabe opened on Nov 14, 2026

• rv32: a call inside a block is declined (Call(0)) when an operand sits beneath its arguments

  pulseengine/synth#1724 · Filter by author avrabe opened on Nov 14, 2026

• CI: the required Rivet Validation check fails open on own missing-link errors and on rivet failures with no ERROR: line

  pulseengine/synth#1723 · Filter by author avrabe opened on Nov 13, 2026

• ARM Thumb-2: an i64 pending below an i32 div_s/rem_u is overwritten

  pulseengine/synth#1721 · Filter by author avrabe opened on Nov 13, 2026
  1

• RV32: i64.clz/ctz/popcnt leave a stale high word when returned as i64

  pulseengine/synth#1720 · Filter by author avrabe opened on Nov 13, 2026

• RV32: an i64 operand pending across i64 div/rem is lost

  pulseengine/synth#1717 · Filter by author avrabe opened on Nov 13, 2026

• ARM Thumb-2: i32.div_s after an earlier return or br_if returns garbage

  pulseengine/synth#1716 · Filter by author avrabe opened on Nov 13, 2026

• ARM Thumb-2: three div/rem terms in one i32 expression give a wrong sum

  pulseengine/synth#1715 · Filter by author avrabe opened on Nov 13, 2026

• ARM and RV32: an i32 param after an i64 param uses the wrong register

  pulseengine/synth#1714 · Filter by author avrabe opened on Nov 13, 2026

• ARM Thumb-2: an i64 local copied with local.tee loses its high word

  pulseengine/synth#1713 · Filter by author avrabe opened on Nov 13, 2026

• ARM Thumb-2: a nested br_if / if / br block returns 0 on its i32.div_s path

  pulseengine/synth#1712 · Filter by author avrabe opened on Nov 13, 2026
  1

• ARM Thumb-2: i64 select on a fused i32 compare returns wrong halves

  pulseengine/synth#1711 · Filter by author avrabe opened on Nov 13, 2026
  2

• ARM Thumb-2: an explicit return of a computed i64 leaves the argument's high word in r1

  pulseengine/synth#1710 · Filter by author avrabe opened on Nov 13, 2026
  2

• synth disasm decodes RV32 and AArch64 ELFs as ARM A32

  pulseengine/synth#1704 · Filter by author avrabe opened on Nov 11, 2026

• RV64 (RV64IMAC/RV64GC) backend: design and sequencing after RV32 reach

  pulseengine/synth#1703 · Filter by author avrabe opened on Nov 11, 2026

• Meld dispatch fallback passes no wasm arguments to imported functions (only the index in r0)

  pulseengine/synth#1699 · Filter by author avrabe opened on Nov 11, 2026

• ARM object: an import whose field name equals an own export binds the call to that export (no undefined symbol)

  pulseengine/synth#1698 · Filter by author avrabe opened on Nov 11, 2026

• ARM optimized path: an import call clobbers caller-saved registers, so a value held in r0 across it is silently wrong

  pulseengine/synth#1696 · Filter by author avrabe opened on Nov 10, 2026

• Cortex-M7 object of a wasm-opt -O2 module computes different floats than the module (synth 0.90.0)

  pulseengine/synth#1691 · Filter by author cpetig opened on Nov 9, 2026
  1

• SILENT MISCOMPILE: under --native-pointer-abi an i64.const naming a memory-0 static is never relocated, so i64 pointer comparisons miss

  pulseengine/synth#1684 · Filter by author avrabe opened on Nov 8, 2026

• synth-backend mpu.rs encodes every PMSAv7 region at twice its size (RASR SIZE field off by one)

  pulseengine/synth#1677 · Filter by author avrabe opened on Nov 8, 2026

• SILENT MISCOMPILE: an imported global shifts every defined global's slot (and the stack-pointer adjustment) on ARM

  pulseengine/synth#1676 · Filter by author avrabe opened on Nov 8, 2026

• multi-memory: f32/f64 load and store on a non-default memory decline (the deferred float sibling of #1622)

  pulseengine/synth#1673 · Filter by author avrabe opened on Nov 7, 2026

• SILENT MISCOMPILE: under --native-pointer-abi, a memory-0 address stored in a data segment is dereferenced as a raw absolute address

  pulseengine/synth#1672 · Filter by author avrabe opened on Nov 7, 2026